Getting Started

PipeRV Documentation

Welcome to the official documentation for the PipeRV Simulator. PipeRV is a high-performance, cycle-accurate 5-stage RISC-V pipeline simulator built for educational purposes and systems architecture analysis.

Cycle-Accurate

Detailed step-by-step execution mirroring real hardware, including forwarding paths, stalls, and hazard detection.

Live Assembly IDE

Write, compile, and run RISC-V assembly directly in your browser with real-time feedback and syntax highlighting.